Freescale Semiconductor /MKL81Z7 /DRY /CR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)SWR 0 (0)DEN 0 (0)TFSR 0 (0)UM 0 (0)ATCS 0 (0)THYS 0 (0)TPFE 0 (0)TDSE 0 (0)TSRE 0 (00)SRF0DPR

SRF=00, TDSE=0, UM=0, TFSR=0, DEN=0, THYS=0, TSRE=0, SWR=0, ATCS=0, TPFE=0

Description

DryIce Control Register

Fields

SWR

Software Reset

0 (0): No effect.

1 (1): Perform a software reset.

DEN

DryIce Enable

0 (0): DryIce clock and prescaler are disabled.

1 (1): DryIce clock and prescaler are enabled.

TFSR

Tamper Force System Reset

0 (0): Do not force chip reset when tampering is detected.

1 (1): Force chip reset when tampering is detected.

UM

Update Mode

0 (0): DryIce Status Register cannot be written when the Status Register Lock bit within the Lock Register (LR[SRL]) is clear.

1 (1): DryIce Status Register cannot be written when the Status Register Lock bit within the Lock Register (LR[SRL]) is clear and DryIce Tamper Flag (SR[DTF]) is set.

ATCS

Active Tamper Clock Source

0 (0): Active Tamper Shift Register clocked by 1 Hz prescaler clock.

1 (1): Active Tamper Shift Register clocked by 512 Hz prescaler clock.

THYS

Tamper Hysteresis Select

0 (0): Hysteresis is set to a range of 305 mV to 440 mV.

1 (1): Hysteresis is set to a range of 490 mV to 705 mV.

TPFE

Tamper Passive Filter Enable

0 (0): Tamper pins are configured with passive input filter disabled

1 (1): Tamper pins are configured with passive input filter enabled

TDSE

Tamper Drive Strength Enable

0 (0): Tamper pins are configured for low drive strength

1 (1): Tamper pins are configured for high drive strength

TSRE

Tamper Slew Rate Enable

0 (0): Tamper pins are configured for slow slew rate.

1 (1): Tamper pins are configured for fast slew rate.

SRF

Secure Register File

0 (00): VBAT Register File is a general purpose register file, it is reset on VBAT POR only and can be accessed by supervisor or non-supervisor software.

2 (10): VBAT Register File is a secure register file that is reset when DryIce Tamper Flag is set. It can only be accessed by software in supervisor mode.

3 (11): VBAT Register File is a secure register file that is reset when DryIce Tamper Flag is set or the DryIce Interrupt asserts. It can only be accessed by software in supervisor mode.

DPR

DryIce Prescaler Register

Links

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